Type of Technology for Solar Cells
Three key elements in a solar cell form the basis of their manufacturing technology.
- Semiconductor – which absorbs light and converts it into electron-hole pairs.
- Semiconductor junction – which separates the photo-generated carriers(electrons and holes)
- The contacts on the front and back of the cell that allow the current to flow to the external circuit
The two main categories of technology are defined by the choice of the semiconductor: either crystalline silicon in a wafer form or thin films of other materials.
- Crystalline silicon (c-Si) has been used as the light-absorbing semiconductor in most solar cells, even though it is a relatively poor absorber of light and requires a considerable thickness (several hundred microns) of material. Nevertheless, it has proved convenient because it yields stable solar cells with good efficiencies and uses process technology developed from the huge knowledge base of the industry.
- Two types of crystalline silicon are used in industry.
- Mono crystalline – produced by slicing wafers (up to 150mm diameter and 350 microns thick) from a high-purity single crystal boule.
- Multi crystalline scilion – made by sawing a cast block of silicon first into bars and then wafers. The main trend in crystalline silicon cell manufacture is toward multi crystalline technology.
- Some companies are using technologies that by-pass some of the inefficiencies of the crystal growth/casting and wafer sawing route.
- To grow a ribbon of silicon, either as a plain two-dimensional strip or as an octagonal column, by pulling it from a silicon melt.
- To melt silicon powder on a cheap conducting substrate.
Above two processes may bring with them other issues of lower growth/pulling rates and poorer uniformly and surface roughness.
Thin film Technology
- The selected materials are all strong light absorbers and only need to be about 1micron thick, so materials costs are significantly reduced. The most common materials are amorphous silicon (a-Si, still silicon, but in a different form), or the polycrystalline materials: cadmium telluride (CdTe) and copper indium (gallium) diselenide (CIS or CIGS).
- Each of these three is amenable to large area deposition (on to substrates of about 1 meter dimensions) and hence high volume
manufacturing. The thin film semiconductor layers are deposited on to either coated glass or stainless steel sheet.
- The semiconductor junctions are formed in different ways, either as a p-in device in amorphous silicon, or as a hetero-junction (e.g. with a thin cadmium sulphide layer) for CdTe and CIS. A transparent conducting oxide layer (such as tin oxide) forms the front electrical contact of the cell, and a metal layer forms the rear contact.
- Amorphous silicon is the most well developed of the thin film technologies. In its simplest form, the cell structure has a single sequence of p-i-n layers. Such cells suffer from significant degradation in their power output (in the range 15-35%) when exposed to the sun.
- Better stability requires the use of thinner layers in order to increase the electric field strength across the material. However, this reduces light absorption and hence cell efficiency.
- This has led the industry to develop tandem and even triple layer devices that contain p-i-n cells stacked one on top of the other. In the cell at the base of the structure, a-Si is sometimes alloyed with germanium to reduce its band gap and further improve light absorption. All this added complexity has a downside though; the processes are more complex and process yields are likely to be lower.
- In order to build up a practically useful voltage from thin film cells, their manufacture usually includes a laser scribing sequence that enables the front and back of adjacent cells to be directly interconnected in series, with no need for further solder connection between cells.
- As before, thin film cells are laminated to produce a weather resistant and environmentally robust module. Although they are less efficient (production modules range from 5 to 8%), thin films are potentially cheaper than c-Si because of their lower materials costs and larger substrate size.
- some thin film materials have shown degradation of performance over time and stabilized efficiencies can be 15-35% lower than initial values. Many thin film technologies have demonstrated best cell efficiencies at research scale above 13%, and best prototype module efficiencies above 10%. The technology that is most successful in achieving low manufacturing costs in the long run is likely to be the one that can deliver the highest stable efficiencies (probably at least 10%) with the highest process yields.
- Amorphous silicon is the most well-developed thin film technology to-date and has an interesting avenue of further development through the use of “micro-crystalline” silicon which seeks to combine the stable high efficiencies of crystalline Si technology with the simpler and cheaper large area deposition technology of amorphous silicon.